integration plasmonic Si nanowire waveguides Research V.Zayets

Comparison of two technologies

of Integration of Si nanowire waveguide and plasmonic waveguide

Technology

Critical conditions, which are used in both fabrication technologies of a plasmonic waveguide

in-plane confinement	out-plane confinement

cross-section. The plasmonic field is shown in yellow color. The Si bridge is shown in green color. The Si bridge makes confinment of plasmon at the center of the metalic stripe and there is no plasmonic field at the edges of the metalic stripe.It makes small the propagation loss of a plasmon in this structure	cross-section of plasmonic structure with Si/SiO2 double dielectric plasmonic structure. Becouse of a thin SiO2 layer, there are more plasmonic field inside Si and less plasmonic field inside Co. It makes small the propagation loss of a plasmon in this structure

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Critical conditions, which are used in both fabrication technologies of a plasmonic waveguide

(critical condition 1) Out-plane confinement

This condition requires the use of a double-layer or multilayer dielectric in a plasmonic structure to achieve an optimum out-plane confinement. When a dielectric consists of several layer, it is possible to optimize the plasmonic structure so that the distribution of the plasmonic field is pushed out of metal and deep into dielectric. Since there is a less field inside the metal, the plasmonic propagation loss becomes much smaller! (Details see here)

(critical condition 2) In-plane confinement

This condition requires the use the dielectric bridge or grove or wedge to achieve an optimum in-plane confinement. (See here or here). There is a substantial scattering loss at the metallic edges of a plasmonic structure. To avoid this huge loss, the plasmon is confined at the center of the metallic structure. It push out the field of the plasmon from the edges of the metal and plasmonic loss is reduced. The bridge or grove or wedge is used for the in-plane confinement (See here).

Can plasmonic waveguides without the in-plane and out-plane confinenements be used?

Should the in-plane and out-plane confinenements be used in a plasmonic waveguide made of gold or silver?

It is better to use. Even without usage the in-plane and out-plane confinenements the propagation loss in a plamonic made of Au or Ag is reasonable, the in-plane and out-plane confinenements make properties of such plasmonic waveguides subtentially better. The propagation loss becomes lower, the bending radius becomes shorter etc.

Technology 1: Using lift-off technique

Technology 1: Using a lift-off technique

step 1	step2	step 3
fabrication of Si- nanowire: making a mask of negative EB resist (n-EB)	fabrication of Si- nanowire: dry and wet etching	fabrication of plasmonic waveguide :making a mask of positive EB resist (p-EB)

step 4	step 5	step 6
fabrication of plasmonic waveguide :deposition of plasmonic material	fabrication of plasmonic waveguide: lift-off	making SiO2 protection

This technology can be only use when a Si-nanowire and plasmonic waveguide are connected in series. It cannot be used in the cases of parallel or side connections.

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Merits:

(1) A thicker plasmonic structure can be used (thicker than 100 nm)

(2) Technology process is simpler.

(3) Protection of Si waveguides during the fabrication of plasmonic parts. All non- plasmonic part is covered by resist and remains fully intact during the fabrication of the plasmonic part.

Demerits:

(1) Moderate coupling loss between Si nanowire and plasmonic waveguides.

(2) A rough edge of the plasmonic section. It causes a subtantial scattering and a high plasmon propagation loss. In order to avoid high propagation loss, light is removed from the edges by in-plane confinement (See above)

Achievements on integration a magneto-optical plasmonic waveguide with a Si-nanowire waveguide (as 2019.04)

SiO₂ / TiO₂ /Co/SiO₂ bridge-type plasmonic waveguide (bridge width= 50 nm); light wavelength: λ= 1520-1600 nm

(1) low propagation loss: 0.7 dB/μm

(2) moderate coupling efficiency between the plasmonic and Si waveguides: 4 dB/facet

Still to fix: Moderate coupling efficiency between the plasmonic and Si waveguides is the major obstacle of this technology!

It does not fit to a key requirement for the total insertion loss of a plasmonic device to be less than 3-5 dB.

Technology flow:

Bridge-type plasmonic

See Click on image to enlarge it

Si nanowire waveguide (450-nm wide) are connected by bridge waveguide. The width of Si bridge is 100 nm. It is cover by a thin metal

(step 1): fabrication of Si- nanowire: making a mask of negative EB resist (n-EB)

Starting wafer: SOI wafer (Si thickness is 220 nm) covered by 50-nm SiO2 (hard mask) and with Cr/Au/Cr alignment masks.

A negative thick EB resist is used ( resist thickness ~ 100 nm) . A negative resist means that parts, which was exposed to the EB beam, is not etched. Si nanowire waveguide width is 450 nm. The width of the spot-size converter is 150 nm. The width of Si-bridge of plasmonic part is 50 nm (70 nm is also OK).

Details see here.

(step 2): fabrication of Si- nanowire: dry and wet etching

RIE dry etch of SiO2 hard mask and Si following by a short wet etching of Si and etching out of remains of SIO2 hard mask

Details see here.

(step 3): fabrication of plasmonic waveguide :making a mask of positive EB resist (p-EB)

LAL (1000 nm) layer + positive resist. A negative resist means that parts, which was exposed to the EB beam, are etched out. The LAL layer is used in order to simplify the lift-off and improve the etch smoothness of the plasmonic part

(step 4): fabrication of plasmonic waveguide :deposition of plasmonic material

Sputtreing of

SiO2 (100 nm) . Purpose: to aligh